Verification Engineer

At Oriole Networks, we are developing disruptive technologies for AI/ML and HPC networking that will revolutionise Data Centers. These technologies will speed up training and inference while dramatically reducing energy consumption for a sustainable future.

• Definition and execution of verification strategies and plans based on specification and collaboration with the broader team

• Develop testbenches at module and system level, including stimulus, monitors, checkers, and scoreboards

• Develop tests, maintain functional coverage models and drive coverage closure

• Support hardware validation, reproducing and debugging complex functional issues, working closely with RTL and system teams, to resolve root causes

• Extensive hands-on industry experience of FPGA or ASIC verification, ideally for GPU/CPU interfacing and networking at 100Gbps and above

• Experience verifying at unit and system level, particularly for FPGA solutions, ideally for production quality IP

• Experience architecting verification environments and infrastructure

• Strong knowledge of verification methodologies, functional coverage, assertions and constrained random verification

• Excellent skills in SystemVerilog

• Scripting and automation, such as TCL and Python

• Experience using Questa, VCS

• Experience of formal verification tools, for example Questa Formal, JasperGold

• Experience of many of the following: UALink, NVLink, PCIe, RDMA, CXL

• A humble attitude and good communication skills

• Bachelor or Master degree in electronics engineering, physics, or other relevant fields or experience within the industry;