Sr. System Performance Architect - OS Modelling and Simulation

• Master's degree or higher in IC, Microelectronics, Computer Science, Communication, or related fields. Relevant experience with practical project work in chip performance modeling, simulation, and collaborative software-hardware optimization.

• Proficiency in system performance modeling and simulation tools (e.g., gem5, QEMU), with the ability to develop and maintain gem5 simulators.

• Deep understanding of the chip design process, with the capability to analyze and optimize chip performance.

• Expertise in software and hardware co-design methodologies to optimize system-level performance.

• Strong knowledge of benchmark construction and microarchitecture design, with the ability to guide CPU microarchitecture optimization.

• Comprehensive healthcare including private medical insurance and life insurance.

• Work-life balance with company sports club, social events, and additional learning and development time off.

• Attractive financial and retirement benefits, including pension schemes and bonus incentives.

You will spearhead advanced system performance modelling and simulation, seamlessly integrating software and hardware to boost efficiency and maintain a competitive edge. By identifying execution hotspots, evaluating performance metrics, driving software-hardware co-optimization, and utilizing tools like gem5, you will lead the way in innovating CPU microarchitecture design, enhancing product performance, and advancing energy efficiency. This role is pivotal in crafting systems that deliver exceptional user experiences and set benchmarks for sustainable excellence.

• Perform system performance modeling and simulation, ensuring the collaborative optimization of software and hardware.

• Identify program execution hotspots and microarchitecture bottlenecks through top-down analysis of computing load requirements and bottlenecks in key service scenarios, guiding software architecture optimization and hardware acceleration implementation.

• Develop performance models for the software load and hardware/chip architecture of terminal systems, creating evaluation models for user experience performance indicators based on software load and hardware specifications, and supporting chip and product planning performance evaluations.

• Lead the development and maintenance of the gem5 emulator to evaluate and optimize system performance in detail.

• Build benchmarks tailored to terminal software characteristics and guide CPU microarchitecture design, vertically optimizing soft and hard cores to enhance product performance and energy efficiency competitiveness.

With a bold vision of bringing digital to every person, home, and organization for a fully connected, intelligent world, Huawei stands as a global leader in ICT solutions. Our workforce of 194,000 spans over 170 countries, crafting unparalleled experiences in telecom networks, IT, smart devices, and cloud services.

Huawei has the largest Research and Development organization in the world with 96,000+ employees in research centers around the globe. In the UK, we already have design centers in Cambridge, London, Edinburgh and Ipswich. We continue to explore and define new research directions and new services. We have expanded our collaborations with academic researchers; researched new network architectures, integration of communications and key enabling technologies; and developed the fundamental theories of these technologies. We invite you to join us on this exciting journey and drive your career forward.

Founded in 1987, Huawei is a leading global provider of information and communications technology (ICT) infrastructure and smart devices. We have 207,000 employees and operate in over 170 countries and regions, serving more than three billion people around the world.

Embark on a career that promises growth, innovation, and a commitment to excellence. At Huawei, your work impacts the global technology landscape, driving forward a smarter, more connected world.